1. Field of the Invention
The present invention relates to a method and device for testing integrated power devices.
2. Discussion of the Related Art
As known, on many integrated power devices, each contact pad on the device is connected to a corresponding pin on the lead frame using two parallel wires, to increase the maximum current withstandable by the connection over the maximum using one wire. A 2 mil gold wire, for example, is incapable of withstanding indefinitely a current of over 2 A, so a second wire is added parallel to the first to double the current capacity.
The problem therefore arises of automatically testing the integrity and correct bonding of both the wires. The bonding process currently employed involves a defect rate of roughly 50-100 ppm. Traditional test methods, however, such as measuring pin-to-pin continuity, fail to discriminate between a faulty connection in which only one wire of a two-wire connection is present, and correct connection of both wires, because the resistance of gold wires is negligible as compared with the overall resistance of the circuit under test. For example, a 2 mil, 3 mm long gold wire presents a resistance of 33 m.OMEGA.. Assuming the test is conducted using 1 A current, the voltage, drop will be 33 mV, which is roughly a hundred times smaller than the roughly 3 V voltage drop across the series diode normally provided between the contact pads. Production tolerances result in a distribution of the voltage drop across the diode which renders detection of the differences in voltage drop due to the presence of one as opposed to two wires undetectable.
One known solution to the above problem consists in providing two contact pads connected by a corresponding wire to the same pin. While enabling testing in the conventional way, such a solution involves an increase in the area of the device, due to the greater number of contact pads employed. In view of the current tendency towards ever increasing miniaturization of integrated circuits and devices, increasing device area is strictly undesirable.
Moreover, on power devices, the necessity frequently arises of testing attachment of the die to the lead frame in the areas involving the power elements of the circuit (typically the final power stages) for ensuring adequate power dissipation.
It is a general goal of the present invention to provide a test method designed to overcome the drawbacks typically associated with known methods.